IEEE

Synthesis of Large Thinned Planar Circular Array Using Two-Stage Alternating Iterative FFT

Abstract: To address the issue of iterative Fourier transform method (IFT) easily falling into local optima in thinned array synthesis, this communication proposes a two-stage alternating iterative ...
IEEE

FPGA Implementation of High-Speed Accelerators for CNN Architecture Using 3D Systolic Array Architecture

Abstract: Convolution Neural Networks (CNNs) are pivotal in image processing. Prominent CNN models include SqueezeNet, MobileNet, Xception, VGG-16, and AlexNet. These models transform 2D data to 1D, ...