Forbes

SiFive Is Leading The Way For Innovation On RISC-V

The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...
Business Wire

SiFive To Introduce New RISC-V Processor Architecture and RISC-V PC at Linley Fall Virtual Processor Conference

SAN MATEO, Calif.--(BUSINESS WIRE)--SiFive, Inc., the leading provider of commercial RISC-V processor IP and silicon solutions, today announced that Dr. Yunsup Lee, CTO of SiFive, and Dr. Krste ...
Geeky Gadgets

RISC-V Vector Processing: A New Era in Computing Efficiency

The computing industry has reached a significant milestone with the ratification of the 1.0 RISC-V Vector Specification. This development marks the beginning of a new era in computing efficiency, as ...
The Next Platform

Hadoop And Spark Get A Vector Performance Boost

Ever since the “Aurora” vector processor designed by NEC was launched last year, we have been wondering if it might be used as a tool to accelerate workloads other than the traditional HPC simulation ...
Network World

Cray to unite scalar, vector computer architectures

Cray plans to create a new supercomputing platform combining four types of processing capability in a blade server architecture. Cray Inc. plans to create a new supercomputing platform combining four ...
Electronic Design

DSP Architecture Targets 5G Endpoints and Radio Access Networks

This article appeared in Microwaves & RF and has been published here with permission. CEVA’s new Gen4 CEVA-XC DSP architecture unifies the principles of scalar and vector processing in a powerful ...